Efficient routability checking for global wires in planar layouts
نویسندگان
چکیده
| In VLSI and printed wiring board design, routing process usually consists of two stages: the global routing and the detailed routing. The routability checking is to decide whether the global wires can be transformed into the detailed ones or not. In this paper, we propose two graphs, the capacity checking graph and the initial ow graph, for the e cient routability checking.
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